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[Embeded-SCM Develop] ref-ddr-sdram-verilog.zip

Description: sdram的verilog的源码实现
Platform: | Size: 903683 | Author: | Hits:

[Other resource] very-good-ok-ref-ddr-sdram-verilog

Description: Sdr SDRAM控制器参考设计,很好的-Sdr SDRAM controller reference design, very good
Platform: | Size: 895594 | Author: 姚明 | Hits:

[Other resource] ddr

Description: ISE MIG1.6 生成的DDR SDRAM控制器代码（含TESHBENCH）
Platform: | Size: 1023228 | Author: yuling | Hits:

[Other resource] leon3-altera-ep2s60-ddr

Description: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Platform: | Size: 114780 | Author: king.xia | Hits:

[File Operate] 我的SDRAM资料收藏

Description: RAM（Random Access Memory）随机存取存储器对于系统性能的影响是每个PC用户都非常清楚的，所以很多朋友趁着现在的内存价格很低纷纷扩容了内存，希望借此来得到更高的性能。不过现在市场是多种内存类型并存的，SDRAM、DDR SDRAM、RDRAM等等，如果你使用的还是非常古老的系统，可能还需要EDO DRAM、FP DRAM（块页）等现在不是很常见的内存-RAM (Random Access Memory) random access memory system performance for the impact of each PC users are very clear, so many of my friends now take advantage of the low prices have memory expansion memory, with a view to get higher performance. But now the market is a mixture of both types of memory, SDRAM, DDR SDRAM, RDRAM, etc. If you use or the very old, may also need to EDO DRAM, FP DRAM (block pages) is now is not very common memory
Platform: | Size: 775018 | Author: 周卫成 | Hits:

[SourceCode] DDR（双速率）SDRAM控制器参考设计VHDL代码

Description: SDRAM的控制程序很复杂，这个对大家肯定有帮助！
Platform: | Size: 1022145 | Author: zsy5460 | Hits:

[VHDL-FPGA-Verilog] ddr_verilog_xilinx

Description: DDR（双速率）SDRAM控制器参考设计，xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
Platform: | Size: 131072 | Author: 陈旭 | Hits:

[Other] !ddr_sdram

Description: ddr sram的官方文档,介绍了ddr sram的使用及其接口等各方面的消息资料.-ddr sram official documents, ddr sram introduced the use of its interface and other sources of information.
Platform: | Size: 452608 | Author: wang | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM_Controller

Description: DDR RAM控制器的VHDL源码，实现平台是Lattice FPGA，功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
Platform: | Size: 677888 | Author: 钟方 | Hits:

[Linux-Unix] tstSdram

Description: pnx1500 ddr test demo
Platform: | Size: 28672 | Author: 曾宏 | Hits:

[Documents] SDRAM-VHDL

Description: SDRAM控制器的VHDL实现，pdf格式，有需要多的，联系我-SDRAM controller VHDL, pdf format, it needs more, Contact
Platform: | Size: 124928 | Author: | Hits:

[Software Engineering] v4_ddr_sdram_controller

Description: 利用v4fpga实现sdram ddr控制器设计，很详细的，很实用的资料-V4fpga the realization of the use of sdram ddr controller design, very detailed, very useful information
Platform: | Size: 417792 | Author: hesonwhb | Hits:

[Other] JESD79E

Description: jesd 组织的ＤＤＲ　ＳＤＲＡＭ规范，希望对你有所帮助-DDR SDRAM Organization jesd norms, and they hope to help you
Platform: | Size: 939008 | Author: feng | Hits:

[Software Engineering] DDR_SDRAM_controller_verilog

Description: DDR SRAM控制器的verilog完整设计文档（包含有完整的verilog源代码），-DDR SRAM controller complete Verilog design documents (including a complete Verilog source code),
Platform: | Size: 475136 | Author: lipengfei | Hits:

[Communication-Mobile] SmallCore_SDRAM

Description: MagicSopc DDR-Sdram
Platform: | Size: 576512 | Author: Rainy | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM_verilog

Description: DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good
Platform: | Size: 752640 | Author: 宋珂 | Hits:

[Software Engineering] mx27ads_x33

Description: i.mx27开发板的整套详细原理图，包括：DDR SDRAM, NAND FLASH, NOR FLASH, USB OTG, USB HOST,FEC PHY, UART,JTAG等等接口-i.MX27 development board schematic details of the package, including: DDR SDRAM, NAND FLASH, NOR FLASH, USB OTG, USB HOST, FEC PHY, UART, JTAG interface, etc.
Platform: | Size: 741376 | Author: 清木 | Hits:

[VHDL-FPGA-Verilog] DDR

Description: leon ep2s60 ddr use altera statix2 and add ddr sdram-leon ep2s60 ddr
Platform: | Size: 752640 | Author: free | Hits:

[VHDL-FPGA-Verilog] DDR-SDRAM-Controller

Description: DDR SDRAM控制器verilog代码及中文说明文档-DDR SDRAM Controller Using Virtex-5 FPGA Devices
Platform: | Size: 262144 | Author: 马龙 | Hits:

[Embeded-SCM Develop] DDR_MO

Description: 使用verilog语言实现简单的DDR SDRAM控制器(Using Verilog language to achieve a simple DDR SDRAM controller)
Platform: | Size: 1101824 | Author: 搬砖123 | Hits:
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